Prof. Hasan has been working as a full Professor and Chairman since March, 2005 and Oct., 2015 respectively. He completed his PhD from the University of Edinburgh, UK on a Commonwealth Scholarship in the area of "Low Power Architectures for Signal Processing and Communications". He also worked as a Visiting Researcher on his own Royal Academy of Engineering, UK funded project on "Low Power FPGA' in the same University. He has published 143 papers in refereed journals and conferences with 985 citations, h-index=17 and i10 index=35. This also includes eleven IEEE Transactions and 43 other journal publications. He received "Paper of the Year Award" by the Editors of the famous International ETRI Journal for his paper entitled "High Performance Low power FFT cores" along with a best International conference paper award. He has supervised four PhDs and currently supervising three more along with many M.Tech. Dissertations. He has delivered several keynote addresses and invited talks in Conferences and Workshops. He has filed three patents on the design of magnetic RAM (MRAM) and one patent on robust SRAM. His research interests are in VLSI Design, Nanoelectronics, Ultra low power design, Spintronics, Battery-less electronics, Variability aware design. He is also a Senior member of IEEE.
Mohit K. Gupta and M. Hasan, “Self-Terminated Write Assist Technique for STT-RAM”, ISI indexed IEEE Transactions on Magnetics, Early access article, 15 March, 2016.
Sayeed Ahmad, M.K. Gupta, Naushad Alam, M. Hasan, “Single-Ended Schmitt-Trigger-Based Robust Low-Power SRAM Cell”, ISI indexed IEEE Transactions on VLSI Systems, Early access article, 8 Feb., 2016.
Mohit Kumar Gupta and M. Hasan, “A Low Power Robust Easily Cascaded PentaMTJ based Combinational and Sequential Circuits” ISI indexed IEEE Transactions on VLSI Systems, Vol. 24, Issue 1, pp. 218-222, Jan. 2016.
Yogendra Upadhyaya, Mohit K. Gupta, M. Hasan, S. Maheshwari, “High Density Magnetic Flash ADC using Domain Wall Motion and Pre-Charge Sense Amplifiers”, ISI indexed IEEE Transactions on Magnetic, Early access article., 4 Dec., 2015.
Mohit K. Gupta and M. Hasan, “Robust High speed Ternary Magnetic Content Addressable Memory” ISI indexed IEEE Transactions on Electron Devices, Vol. 62, Issue 4, pp. 1163-1169, April, 2015.
Mohit Kumar Gupta and M. Hasan, “Design of high speed energy efficient masking error immune PentaMTJ based TCAM” ISI indexed IEEE Transactions on Magnetics, Vol. 51, No. 2, 3400209, Feb., 2015.
Ale Imran, Aminul Islam, M. Hasan and S.A. Abbasi, “Optimized Design of a 32nm CNFET based Low Power Ultra Wide band CCII”, ISI indexed IEEE Transactions on Nanotechnology, Vol. 11, Issue 6, pp. 1100-1109, Nov., 2012.
Aminul Islam and Mohd. Hasan, “Leakage Characterization of 10T SRAM Cell”, ISI indexed IEEE Transactions on Electron Devices, Vol. 59, Issue 3, pp. 631-638, March, 2012.
W. Han, A.T. Erdogan, T. Arslan and M. Hasan, ‘High performance low power FFT cores’, ISI indexed ETRI Journal, vol.30, no.3, pp. 451-460, June 2008. (Paper of the year 2008 award)
S.D. Pable and Mohd. Hasan, “Interconnect Design for Subthreshold Circuits”, ISI indexed IEEE Transactions on Nanotechnology, Vol. 11, Issue 3, pp. 633-639, May, 2012
M. Hasan, T. Arslan and John Thompson, ‘A Novel coefficient ordering based low power pipelined radix-4 FFT processor for wireless LAN applications’, ISI indexed IEEE Transactions on Consumer Electronics, vol. 49, no. 1, pp.128-134, February, 2003.